FFmpeg coverage


Directory: ../../../ffmpeg/
File: src/libavcodec/x86/mathops.h
Date: 2026-08-15 14:54:27
Exec Total Coverage
Lines: 12 12 100.0%
Functions: 3 3 100.0%
Branches: 0 0 -%

Line Branch Exec Source
1 /*
2 * simple math operations
3 * Copyright (c) 2006 Michael Niedermayer <michaelni@gmx.at> et al
4 *
5 * This file is part of FFmpeg.
6 *
7 * FFmpeg is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * FFmpeg is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with FFmpeg; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22 #ifndef AVCODEC_X86_MATHOPS_H
23 #define AVCODEC_X86_MATHOPS_H
24
25 #include "config.h"
26
27 #include "libavutil/common.h"
28
29 #if HAVE_INLINE_ASM
30
31 #if ARCH_X86_32
32
33 #define MULL MULL
34 static av_always_inline av_const int MULL(int a, int b, unsigned shift)
35 {
36 int rt, dummy;
37 if (__builtin_constant_p(shift))
38 __asm__ (
39 "imull %3 \n\t"
40 "shrdl %4, %%edx, %%eax \n\t"
41 :"=a"(rt), "=d"(dummy)
42 :"a"(a), "rm"(b), "i"(shift & 0x1F)
43 );
44 else
45 __asm__ (
46 "imull %3 \n\t"
47 "shrdl %4, %%edx, %%eax \n\t"
48 :"=a"(rt), "=d"(dummy)
49 :"a"(a), "rm"(b), "c"((uint8_t)shift)
50 );
51 return rt;
52 }
53
54 #define MULH MULH
55 static av_always_inline av_const int MULH(int a, int b)
56 {
57 int rt, dummy;
58 __asm__ (
59 "imull %3"
60 :"=d"(rt), "=a"(dummy)
61 :"a"(a), "rm"(b)
62 );
63 return rt;
64 }
65
66 #define MUL64 MUL64
67 static av_always_inline av_const int64_t MUL64(int a, int b)
68 {
69 int64_t rt;
70 __asm__ (
71 "imull %2"
72 :"=A"(rt)
73 :"a"(a), "rm"(b)
74 );
75 return rt;
76 }
77
78 #endif /* ARCH_X86_32 */
79
80 #if HAVE_I686
81 /* median of 3 */
82 #define mid_pred mid_pred
83 1100177060 static inline av_const int mid_pred(int a, int b, int c)
84 {
85 1100177060 int i=b;
86 1100177060 __asm__ (
87 "cmp %2, %1 \n\t"
88 "cmovg %1, %0 \n\t"
89 "cmovg %2, %1 \n\t"
90 "cmp %3, %1 \n\t"
91 "cmovl %3, %1 \n\t"
92 "cmp %1, %0 \n\t"
93 "cmovg %1, %0 \n\t"
94 :"+&r"(i), "+&r"(a)
95 :"r"(b), "r"(c)
96 );
97 1100177060 return i;
98 }
99
100 #if HAVE_X86_6REGS
101 #define COPY3_IF_LT(x, y, a, b, c, d)\
102 __asm__ volatile(\
103 "cmpl %0, %3 \n\t"\
104 "cmovl %3, %0 \n\t"\
105 "cmovl %4, %1 \n\t"\
106 "cmovl %5, %2 \n\t"\
107 : "+&r" (x), "+&r" (a), "+r" (c)\
108 : "r" (y), "r" (b), "r" (d)\
109 );
110 #endif /* HAVE_X86_6REGS */
111
112 #endif /* HAVE_I686 */
113
114 #define MASK_ABS(mask, level) \
115 __asm__ ("cdq \n\t" \
116 "xorl %1, %0 \n\t" \
117 "subl %1, %0 \n\t" \
118 : "+a"(level), "=&d"(mask))
119
120 // avoid +32 for shift optimization (gcc should do that ...)
121 #define NEG_SSR32 NEG_SSR32
122 399870846 static inline int32_t NEG_SSR32( int32_t a, int8_t s){
123 if (__builtin_constant_p(s))
124 __asm__ ("sarl %1, %0\n\t"
125 : "+r" (a)
126 : "i" (-s & 0x1F)
127 );
128 else
129 399870846 __asm__ ("sarl %1, %0\n\t"
130 : "+r" (a)
131 399870846 : "c" ((uint8_t)(-s))
132 );
133 399870846 return a;
134 }
135
136 #define NEG_USR32 NEG_USR32
137 1850710522 static inline uint32_t NEG_USR32(uint32_t a, int8_t s){
138 if (__builtin_constant_p(s))
139 __asm__ ("shrl %1, %0\n\t"
140 : "+r" (a)
141 : "i" (-s & 0x1F)
142 );
143 else
144 1850710522 __asm__ ("shrl %1, %0\n\t"
145 : "+r" (a)
146 1850710522 : "c" ((uint8_t)(-s))
147 );
148 1850710522 return a;
149 }
150
151 #endif /* HAVE_INLINE_ASM */
152 #endif /* AVCODEC_X86_MATHOPS_H */
153