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/* |
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* SIMD-optimized forward DCT |
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* The gcc porting is Copyright (c) 2001 Fabrice Bellard. |
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* cleanup/optimizations are Copyright (c) 2002-2004 Michael Niedermayer <michaelni@gmx.at> |
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* SSE2 optimization is Copyright (c) 2004 Denes Balatoni. |
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* |
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* from fdctam32.c - AP922 MMX(3D-Now) forward-DCT |
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* |
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* Intel Application Note AP-922 - fast, precise implementation of DCT |
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* http://developer.intel.com/vtune/cbts/appnotes.htm |
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* |
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* Also of inspiration: |
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* a page about fdct at http://www.geocities.com/ssavekar/dct.htm |
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* Skal's fdct at http://skal.planet-d.net/coding/dct.html |
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* |
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* This file is part of FFmpeg. |
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* |
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* FFmpeg is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU Lesser General Public |
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* License as published by the Free Software Foundation; either |
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* version 2.1 of the License, or (at your option) any later version. |
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* |
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* FFmpeg is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public |
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* License along with FFmpeg; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
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*/ |
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#include "libavutil/common.h" |
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#include "libavutil/x86/asm.h" |
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#include "fdct.h" |
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#if HAVE_MMX_INLINE |
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////////////////////////////////////////////////////////////////////// |
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// |
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// constants for the forward DCT |
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// ----------------------------- |
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// |
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// Be sure to check that your compiler is aligning all constants to QWORD |
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// (8-byte) memory boundaries! Otherwise the unaligned memory access will |
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// severely stall MMX execution. |
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// |
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////////////////////////////////////////////////////////////////////// |
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#define BITS_FRW_ACC 3 //; 2 or 3 for accuracy |
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#define SHIFT_FRW_COL BITS_FRW_ACC |
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#define SHIFT_FRW_ROW (BITS_FRW_ACC + 17 - 3) |
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#define RND_FRW_ROW (1 << (SHIFT_FRW_ROW-1)) |
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//#define RND_FRW_COL (1 << (SHIFT_FRW_COL-1)) |
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#define X8(x) x,x,x,x,x,x,x,x |
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//concatenated table, for forward DCT transformation |
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DECLARE_ALIGNED(16, static const int16_t, fdct_tg_all_16)[24] = { |
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X8(13036), // tg * (2<<16) + 0.5 |
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X8(27146), // tg * (2<<16) + 0.5 |
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X8(-21746) // tg * (2<<16) + 0.5 |
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}; |
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DECLARE_ALIGNED(16, static const int16_t, ocos_4_16)[8] = { |
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X8(23170) //cos * (2<<15) + 0.5 |
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}; |
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DECLARE_ALIGNED(16, static const int16_t, fdct_one_corr)[8] = { X8(1) }; |
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DECLARE_ALIGNED(8, static const int32_t, fdct_r_row)[2] = {RND_FRW_ROW, RND_FRW_ROW }; |
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static const struct |
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{ |
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DECLARE_ALIGNED(16, const int32_t, fdct_r_row_sse2)[4]; |
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} fdct_r_row_sse2 = |
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{{ |
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RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW |
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}}; |
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//DECLARE_ALIGNED(16, static const long, fdct_r_row_sse2)[4] = {RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW}; |
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DECLARE_ALIGNED(8, static const int16_t, tab_frw_01234567)[] = { // forward_dct coeff table |
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16384, 16384, 22725, 19266, |
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16384, 16384, 12873, 4520, |
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21407, 8867, 19266, -4520, |
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-8867, -21407, -22725, -12873, |
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16384, -16384, 12873, -22725, |
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-16384, 16384, 4520, 19266, |
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8867, -21407, 4520, -12873, |
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21407, -8867, 19266, -22725, |
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22725, 22725, 31521, 26722, |
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22725, 22725, 17855, 6270, |
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29692, 12299, 26722, -6270, |
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-12299, -29692, -31521, -17855, |
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22725, -22725, 17855, -31521, |
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-22725, 22725, 6270, 26722, |
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12299, -29692, 6270, -17855, |
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29692, -12299, 26722, -31521, |
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21407, 21407, 29692, 25172, |
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21407, 21407, 16819, 5906, |
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27969, 11585, 25172, -5906, |
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-11585, -27969, -29692, -16819, |
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21407, -21407, 16819, -29692, |
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-21407, 21407, 5906, 25172, |
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11585, -27969, 5906, -16819, |
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27969, -11585, 25172, -29692, |
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19266, 19266, 26722, 22654, |
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19266, 19266, 15137, 5315, |
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25172, 10426, 22654, -5315, |
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-10426, -25172, -26722, -15137, |
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19266, -19266, 15137, -26722, |
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-19266, 19266, 5315, 22654, |
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10426, -25172, 5315, -15137, |
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25172, -10426, 22654, -26722, |
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16384, 16384, 22725, 19266, |
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16384, 16384, 12873, 4520, |
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21407, 8867, 19266, -4520, |
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-8867, -21407, -22725, -12873, |
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16384, -16384, 12873, -22725, |
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-16384, 16384, 4520, 19266, |
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8867, -21407, 4520, -12873, |
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21407, -8867, 19266, -22725, |
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128 |
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19266, 19266, 26722, 22654, |
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19266, 19266, 15137, 5315, |
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25172, 10426, 22654, -5315, |
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-10426, -25172, -26722, -15137, |
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19266, -19266, 15137, -26722, |
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-19266, 19266, 5315, 22654, |
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10426, -25172, 5315, -15137, |
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25172, -10426, 22654, -26722, |
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137 |
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21407, 21407, 29692, 25172, |
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21407, 21407, 16819, 5906, |
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27969, 11585, 25172, -5906, |
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-11585, -27969, -29692, -16819, |
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21407, -21407, 16819, -29692, |
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-21407, 21407, 5906, 25172, |
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11585, -27969, 5906, -16819, |
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27969, -11585, 25172, -29692, |
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146 |
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22725, 22725, 31521, 26722, |
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22725, 22725, 17855, 6270, |
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29692, 12299, 26722, -6270, |
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-12299, -29692, -31521, -17855, |
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22725, -22725, 17855, -31521, |
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-22725, 22725, 6270, 26722, |
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12299, -29692, 6270, -17855, |
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29692, -12299, 26722, -31521, |
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}; |
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static const struct |
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{ |
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DECLARE_ALIGNED(16, const int16_t, tab_frw_01234567_sse2)[256]; |
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} tab_frw_01234567_sse2 = |
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{{ |
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//DECLARE_ALIGNED(16, static const int16_t, tab_frw_01234567_sse2)[] = { // forward_dct coeff table |
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#define TABLE_SSE2 C4, C4, C1, C3, -C6, -C2, -C1, -C5, \ |
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C4, C4, C5, C7, C2, C6, C3, -C7, \ |
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-C4, C4, C7, C3, C6, -C2, C7, -C5, \ |
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C4, -C4, C5, -C1, C2, -C6, C3, -C1, |
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// c1..c7 * cos(pi/4) * 2^15 |
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#define C1 22725 |
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#define C2 21407 |
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#define C3 19266 |
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#define C4 16384 |
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#define C5 12873 |
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#define C6 8867 |
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#define C7 4520 |
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TABLE_SSE2 |
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#undef C1 |
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#undef C2 |
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#undef C3 |
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#undef C4 |
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#undef C5 |
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#undef C6 |
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#undef C7 |
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#define C1 31521 |
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#define C2 29692 |
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#define C3 26722 |
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#define C4 22725 |
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#define C5 17855 |
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#define C6 12299 |
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#define C7 6270 |
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TABLE_SSE2 |
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192 |
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#undef C1 |
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#undef C2 |
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#undef C3 |
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#undef C4 |
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#undef C5 |
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#undef C6 |
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#undef C7 |
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#define C1 29692 |
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#define C2 27969 |
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#define C3 25172 |
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#define C4 21407 |
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#define C5 16819 |
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#define C6 11585 |
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#define C7 5906 |
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TABLE_SSE2 |
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208 |
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#undef C1 |
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#undef C2 |
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#undef C3 |
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#undef C4 |
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#undef C5 |
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#undef C6 |
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#undef C7 |
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#define C1 26722 |
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#define C2 25172 |
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#define C3 22654 |
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#define C4 19266 |
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#define C5 15137 |
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#define C6 10426 |
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#define C7 5315 |
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TABLE_SSE2 |
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224 |
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#undef C1 |
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#undef C2 |
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#undef C3 |
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#undef C4 |
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#undef C5 |
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#undef C6 |
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#undef C7 |
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#define C1 22725 |
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#define C2 21407 |
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#define C3 19266 |
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#define C4 16384 |
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#define C5 12873 |
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#define C6 8867 |
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#define C7 4520 |
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TABLE_SSE2 |
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240 |
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#undef C1 |
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#undef C2 |
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#undef C3 |
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#undef C4 |
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#undef C5 |
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#undef C6 |
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#undef C7 |
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#define C1 26722 |
248 |
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#define C2 25172 |
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#define C3 22654 |
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#define C4 19266 |
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#define C5 15137 |
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#define C6 10426 |
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#define C7 5315 |
254 |
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TABLE_SSE2 |
255 |
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256 |
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#undef C1 |
257 |
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#undef C2 |
258 |
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#undef C3 |
259 |
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#undef C4 |
260 |
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#undef C5 |
261 |
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#undef C6 |
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#undef C7 |
263 |
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#define C1 29692 |
264 |
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#define C2 27969 |
265 |
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#define C3 25172 |
266 |
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#define C4 21407 |
267 |
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#define C5 16819 |
268 |
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#define C6 11585 |
269 |
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#define C7 5906 |
270 |
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TABLE_SSE2 |
271 |
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272 |
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#undef C1 |
273 |
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#undef C2 |
274 |
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#undef C3 |
275 |
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#undef C4 |
276 |
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#undef C5 |
277 |
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#undef C6 |
278 |
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#undef C7 |
279 |
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#define C1 31521 |
280 |
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#define C2 29692 |
281 |
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#define C3 26722 |
282 |
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#define C4 22725 |
283 |
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#define C5 17855 |
284 |
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#define C6 12299 |
285 |
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#define C7 6270 |
286 |
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TABLE_SSE2 |
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}}; |
288 |
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289 |
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#define S(s) AV_TOSTRING(s) //AV_STRINGIFY is too long |
290 |
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291 |
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#define FDCT_COL(cpu, mm, mov)\ |
292 |
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static av_always_inline void fdct_col_##cpu(const int16_t *in, int16_t *out, int offset)\ |
293 |
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{\ |
294 |
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__asm__ volatile (\ |
295 |
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#mov" 16(%0), %%"#mm"0 \n\t" \ |
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#mov" 96(%0), %%"#mm"1 \n\t" \ |
297 |
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#mov" %%"#mm"0, %%"#mm"2 \n\t" \ |
298 |
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#mov" 32(%0), %%"#mm"3 \n\t" \ |
299 |
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"paddsw %%"#mm"1, %%"#mm"0 \n\t" \ |
300 |
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#mov" 80(%0), %%"#mm"4 \n\t" \ |
301 |
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"psllw $"S(SHIFT_FRW_COL)", %%"#mm"0 \n\t" \ |
302 |
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#mov" (%0), %%"#mm"5 \n\t" \ |
303 |
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"paddsw %%"#mm"3, %%"#mm"4 \n\t" \ |
304 |
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"paddsw 112(%0), %%"#mm"5 \n\t" \ |
305 |
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"psllw $"S(SHIFT_FRW_COL)", %%"#mm"4 \n\t" \ |
306 |
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#mov" %%"#mm"0, %%"#mm"6 \n\t" \ |
307 |
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"psubsw %%"#mm"1, %%"#mm"2 \n\t" \ |
308 |
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#mov" 16(%1), %%"#mm"1 \n\t" \ |
309 |
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"psubsw %%"#mm"4, %%"#mm"0 \n\t" \ |
310 |
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#mov" 48(%0), %%"#mm"7 \n\t" \ |
311 |
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"pmulhw %%"#mm"0, %%"#mm"1 \n\t" \ |
312 |
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"paddsw 64(%0), %%"#mm"7 \n\t" \ |
313 |
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"psllw $"S(SHIFT_FRW_COL)", %%"#mm"5 \n\t" \ |
314 |
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"paddsw %%"#mm"4, %%"#mm"6 \n\t" \ |
315 |
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"psllw $"S(SHIFT_FRW_COL)", %%"#mm"7 \n\t" \ |
316 |
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#mov" %%"#mm"5, %%"#mm"4 \n\t" \ |
317 |
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"psubsw %%"#mm"7, %%"#mm"5 \n\t" \ |
318 |
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"paddsw %%"#mm"5, %%"#mm"1 \n\t" \ |
319 |
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"paddsw %%"#mm"7, %%"#mm"4 \n\t" \ |
320 |
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"por (%2), %%"#mm"1 \n\t" \ |
321 |
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"psllw $"S(SHIFT_FRW_COL)"+1, %%"#mm"2 \n\t" \ |
322 |
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"pmulhw 16(%1), %%"#mm"5 \n\t" \ |
323 |
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#mov" %%"#mm"4, %%"#mm"7 \n\t" \ |
324 |
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"psubsw 80(%0), %%"#mm"3 \n\t" \ |
325 |
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"psubsw %%"#mm"6, %%"#mm"4 \n\t" \ |
326 |
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#mov" %%"#mm"1, 32(%3) \n\t" \ |
327 |
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"paddsw %%"#mm"6, %%"#mm"7 \n\t" \ |
328 |
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#mov" 48(%0), %%"#mm"1 \n\t" \ |
329 |
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"psllw $"S(SHIFT_FRW_COL)"+1, %%"#mm"3 \n\t" \ |
330 |
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"psubsw 64(%0), %%"#mm"1 \n\t" \ |
331 |
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#mov" %%"#mm"2, %%"#mm"6 \n\t" \ |
332 |
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#mov" %%"#mm"4, 64(%3) \n\t" \ |
333 |
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"paddsw %%"#mm"3, %%"#mm"2 \n\t" \ |
334 |
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"pmulhw (%4), %%"#mm"2 \n\t" \ |
335 |
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"psubsw %%"#mm"3, %%"#mm"6 \n\t" \ |
336 |
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"pmulhw (%4), %%"#mm"6 \n\t" \ |
337 |
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"psubsw %%"#mm"0, %%"#mm"5 \n\t" \ |
338 |
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"por (%2), %%"#mm"5 \n\t" \ |
339 |
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"psllw $"S(SHIFT_FRW_COL)", %%"#mm"1 \n\t" \ |
340 |
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"por (%2), %%"#mm"2 \n\t" \ |
341 |
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#mov" %%"#mm"1, %%"#mm"4 \n\t" \ |
342 |
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#mov" (%0), %%"#mm"3 \n\t" \ |
343 |
|
|
"paddsw %%"#mm"6, %%"#mm"1 \n\t" \ |
344 |
|
|
"psubsw 112(%0), %%"#mm"3 \n\t" \ |
345 |
|
|
"psubsw %%"#mm"6, %%"#mm"4 \n\t" \ |
346 |
|
|
#mov" (%1), %%"#mm"0 \n\t" \ |
347 |
|
|
"psllw $"S(SHIFT_FRW_COL)", %%"#mm"3 \n\t" \ |
348 |
|
|
#mov" 32(%1), %%"#mm"6 \n\t" \ |
349 |
|
|
"pmulhw %%"#mm"1, %%"#mm"0 \n\t" \ |
350 |
|
|
#mov" %%"#mm"7, (%3) \n\t" \ |
351 |
|
|
"pmulhw %%"#mm"4, %%"#mm"6 \n\t" \ |
352 |
|
|
#mov" %%"#mm"5, 96(%3) \n\t" \ |
353 |
|
|
#mov" %%"#mm"3, %%"#mm"7 \n\t" \ |
354 |
|
|
#mov" 32(%1), %%"#mm"5 \n\t" \ |
355 |
|
|
"psubsw %%"#mm"2, %%"#mm"7 \n\t" \ |
356 |
|
|
"paddsw %%"#mm"2, %%"#mm"3 \n\t" \ |
357 |
|
|
"pmulhw %%"#mm"7, %%"#mm"5 \n\t" \ |
358 |
|
|
"paddsw %%"#mm"3, %%"#mm"0 \n\t" \ |
359 |
|
|
"paddsw %%"#mm"4, %%"#mm"6 \n\t" \ |
360 |
|
|
"pmulhw (%1), %%"#mm"3 \n\t" \ |
361 |
|
|
"por (%2), %%"#mm"0 \n\t" \ |
362 |
|
|
"paddsw %%"#mm"7, %%"#mm"5 \n\t" \ |
363 |
|
|
"psubsw %%"#mm"6, %%"#mm"7 \n\t" \ |
364 |
|
|
#mov" %%"#mm"0, 16(%3) \n\t" \ |
365 |
|
|
"paddsw %%"#mm"4, %%"#mm"5 \n\t" \ |
366 |
|
|
#mov" %%"#mm"7, 48(%3) \n\t" \ |
367 |
|
|
"psubsw %%"#mm"1, %%"#mm"3 \n\t" \ |
368 |
|
|
#mov" %%"#mm"5, 80(%3) \n\t" \ |
369 |
|
|
#mov" %%"#mm"3, 112(%3) \n\t" \ |
370 |
|
|
: \ |
371 |
|
|
: "r" (in + offset), "r" (fdct_tg_all_16), "r" (fdct_one_corr), \ |
372 |
|
|
"r" (out + offset), "r" (ocos_4_16)); \ |
373 |
|
|
} |
374 |
|
|
|
375 |
|
80000 |
FDCT_COL(mmx, mm, movq) |
376 |
|
20000 |
FDCT_COL(sse2, xmm, movdqa) |
377 |
|
|
|
378 |
|
20000 |
static av_always_inline void fdct_row_sse2(const int16_t *in, int16_t *out) |
379 |
|
|
{ |
380 |
|
20000 |
__asm__ volatile( |
381 |
|
|
#define FDCT_ROW_SSE2_H1(i,t) \ |
382 |
|
|
"movq " #i "(%0), %%xmm2 \n\t" \ |
383 |
|
|
"movq " #i "+8(%0), %%xmm0 \n\t" \ |
384 |
|
|
"movdqa " #t "+32(%1), %%xmm3 \n\t" \ |
385 |
|
|
"movdqa " #t "+48(%1), %%xmm7 \n\t" \ |
386 |
|
|
"movdqa " #t "(%1), %%xmm4 \n\t" \ |
387 |
|
|
"movdqa " #t "+16(%1), %%xmm5 \n\t" |
388 |
|
|
|
389 |
|
|
#define FDCT_ROW_SSE2_H2(i,t) \ |
390 |
|
|
"movq " #i "(%0), %%xmm2 \n\t" \ |
391 |
|
|
"movq " #i "+8(%0), %%xmm0 \n\t" \ |
392 |
|
|
"movdqa " #t "+32(%1), %%xmm3 \n\t" \ |
393 |
|
|
"movdqa " #t "+48(%1), %%xmm7 \n\t" |
394 |
|
|
|
395 |
|
|
#define FDCT_ROW_SSE2(i) \ |
396 |
|
|
"movq %%xmm2, %%xmm1 \n\t" \ |
397 |
|
|
"pshuflw $27, %%xmm0, %%xmm0 \n\t" \ |
398 |
|
|
"paddsw %%xmm0, %%xmm1 \n\t" \ |
399 |
|
|
"psubsw %%xmm0, %%xmm2 \n\t" \ |
400 |
|
|
"punpckldq %%xmm2, %%xmm1 \n\t" \ |
401 |
|
|
"pshufd $78, %%xmm1, %%xmm2 \n\t" \ |
402 |
|
|
"pmaddwd %%xmm2, %%xmm3 \n\t" \ |
403 |
|
|
"pmaddwd %%xmm1, %%xmm7 \n\t" \ |
404 |
|
|
"pmaddwd %%xmm5, %%xmm2 \n\t" \ |
405 |
|
|
"pmaddwd %%xmm4, %%xmm1 \n\t" \ |
406 |
|
|
"paddd %%xmm7, %%xmm3 \n\t" \ |
407 |
|
|
"paddd %%xmm2, %%xmm1 \n\t" \ |
408 |
|
|
"paddd %%xmm6, %%xmm3 \n\t" \ |
409 |
|
|
"paddd %%xmm6, %%xmm1 \n\t" \ |
410 |
|
|
"psrad %3, %%xmm3 \n\t" \ |
411 |
|
|
"psrad %3, %%xmm1 \n\t" \ |
412 |
|
|
"packssdw %%xmm3, %%xmm1 \n\t" \ |
413 |
|
|
"movdqa %%xmm1, " #i "(%4) \n\t" |
414 |
|
|
|
415 |
|
|
"movdqa (%2), %%xmm6 \n\t" |
416 |
|
|
FDCT_ROW_SSE2_H1(0,0) |
417 |
|
|
FDCT_ROW_SSE2(0) |
418 |
|
|
FDCT_ROW_SSE2_H2(64,0) |
419 |
|
|
FDCT_ROW_SSE2(64) |
420 |
|
|
|
421 |
|
|
FDCT_ROW_SSE2_H1(16,64) |
422 |
|
|
FDCT_ROW_SSE2(16) |
423 |
|
|
FDCT_ROW_SSE2_H2(112,64) |
424 |
|
|
FDCT_ROW_SSE2(112) |
425 |
|
|
|
426 |
|
|
FDCT_ROW_SSE2_H1(32,128) |
427 |
|
|
FDCT_ROW_SSE2(32) |
428 |
|
|
FDCT_ROW_SSE2_H2(96,128) |
429 |
|
|
FDCT_ROW_SSE2(96) |
430 |
|
|
|
431 |
|
|
FDCT_ROW_SSE2_H1(48,192) |
432 |
|
|
FDCT_ROW_SSE2(48) |
433 |
|
|
FDCT_ROW_SSE2_H2(80,192) |
434 |
|
|
FDCT_ROW_SSE2(80) |
435 |
|
|
: |
436 |
|
|
: "r" (in), "r" (tab_frw_01234567_sse2.tab_frw_01234567_sse2), |
437 |
|
|
"r" (fdct_r_row_sse2.fdct_r_row_sse2), "i" (SHIFT_FRW_ROW), "r" (out) |
438 |
|
|
XMM_CLOBBERS_ONLY("%xmm0", "%xmm1", "%xmm2", "%xmm3", |
439 |
|
|
"%xmm4", "%xmm5", "%xmm6", "%xmm7") |
440 |
|
|
); |
441 |
|
20000 |
} |
442 |
|
|
|
443 |
|
160000 |
static av_always_inline void fdct_row_mmxext(const int16_t *in, int16_t *out, |
444 |
|
|
const int16_t *table) |
445 |
|
|
{ |
446 |
|
160000 |
__asm__ volatile ( |
447 |
|
|
"pshufw $0x1B, 8(%0), %%mm5 \n\t" |
448 |
|
|
"movq (%0), %%mm0 \n\t" |
449 |
|
|
"movq %%mm0, %%mm1 \n\t" |
450 |
|
|
"paddsw %%mm5, %%mm0 \n\t" |
451 |
|
|
"psubsw %%mm5, %%mm1 \n\t" |
452 |
|
|
"movq %%mm0, %%mm2 \n\t" |
453 |
|
|
"punpckldq %%mm1, %%mm0 \n\t" |
454 |
|
|
"punpckhdq %%mm1, %%mm2 \n\t" |
455 |
|
|
"movq (%1), %%mm1 \n\t" |
456 |
|
|
"movq 8(%1), %%mm3 \n\t" |
457 |
|
|
"movq 16(%1), %%mm4 \n\t" |
458 |
|
|
"movq 24(%1), %%mm5 \n\t" |
459 |
|
|
"movq 32(%1), %%mm6 \n\t" |
460 |
|
|
"movq 40(%1), %%mm7 \n\t" |
461 |
|
|
"pmaddwd %%mm0, %%mm1 \n\t" |
462 |
|
|
"pmaddwd %%mm2, %%mm3 \n\t" |
463 |
|
|
"pmaddwd %%mm0, %%mm4 \n\t" |
464 |
|
|
"pmaddwd %%mm2, %%mm5 \n\t" |
465 |
|
|
"pmaddwd %%mm0, %%mm6 \n\t" |
466 |
|
|
"pmaddwd %%mm2, %%mm7 \n\t" |
467 |
|
|
"pmaddwd 48(%1), %%mm0 \n\t" |
468 |
|
|
"pmaddwd 56(%1), %%mm2 \n\t" |
469 |
|
|
"paddd %%mm1, %%mm3 \n\t" |
470 |
|
|
"paddd %%mm4, %%mm5 \n\t" |
471 |
|
|
"paddd %%mm6, %%mm7 \n\t" |
472 |
|
|
"paddd %%mm0, %%mm2 \n\t" |
473 |
|
|
"movq (%2), %%mm0 \n\t" |
474 |
|
|
"paddd %%mm0, %%mm3 \n\t" |
475 |
|
|
"paddd %%mm0, %%mm5 \n\t" |
476 |
|
|
"paddd %%mm0, %%mm7 \n\t" |
477 |
|
|
"paddd %%mm0, %%mm2 \n\t" |
478 |
|
|
"psrad $"S(SHIFT_FRW_ROW)", %%mm3 \n\t" |
479 |
|
|
"psrad $"S(SHIFT_FRW_ROW)", %%mm5 \n\t" |
480 |
|
|
"psrad $"S(SHIFT_FRW_ROW)", %%mm7 \n\t" |
481 |
|
|
"psrad $"S(SHIFT_FRW_ROW)", %%mm2 \n\t" |
482 |
|
|
"packssdw %%mm5, %%mm3 \n\t" |
483 |
|
|
"packssdw %%mm2, %%mm7 \n\t" |
484 |
|
|
"movq %%mm3, (%3) \n\t" |
485 |
|
|
"movq %%mm7, 8(%3) \n\t" |
486 |
|
|
: |
487 |
|
|
: "r" (in), "r" (table), "r" (fdct_r_row), "r" (out)); |
488 |
|
160000 |
} |
489 |
|
|
|
490 |
|
160000 |
static av_always_inline void fdct_row_mmx(const int16_t *in, int16_t *out, const int16_t *table) |
491 |
|
|
{ |
492 |
|
|
//FIXME reorder (I do not have an old MMX-only CPU here to benchmark ...) |
493 |
|
160000 |
__asm__ volatile( |
494 |
|
|
"movd 12(%0), %%mm1 \n\t" |
495 |
|
|
"punpcklwd 8(%0), %%mm1 \n\t" |
496 |
|
|
"movq %%mm1, %%mm2 \n\t" |
497 |
|
|
"psrlq $0x20, %%mm1 \n\t" |
498 |
|
|
"movq 0(%0), %%mm0 \n\t" |
499 |
|
|
"punpcklwd %%mm2, %%mm1 \n\t" |
500 |
|
|
"movq %%mm0, %%mm5 \n\t" |
501 |
|
|
"paddsw %%mm1, %%mm0 \n\t" |
502 |
|
|
"psubsw %%mm1, %%mm5 \n\t" |
503 |
|
|
"movq %%mm0, %%mm2 \n\t" |
504 |
|
|
"punpckldq %%mm5, %%mm0 \n\t" |
505 |
|
|
"punpckhdq %%mm5, %%mm2 \n\t" |
506 |
|
|
"movq 0(%1), %%mm1 \n\t" |
507 |
|
|
"movq 8(%1), %%mm3 \n\t" |
508 |
|
|
"movq 16(%1), %%mm4 \n\t" |
509 |
|
|
"movq 24(%1), %%mm5 \n\t" |
510 |
|
|
"movq 32(%1), %%mm6 \n\t" |
511 |
|
|
"movq 40(%1), %%mm7 \n\t" |
512 |
|
|
"pmaddwd %%mm0, %%mm1 \n\t" |
513 |
|
|
"pmaddwd %%mm2, %%mm3 \n\t" |
514 |
|
|
"pmaddwd %%mm0, %%mm4 \n\t" |
515 |
|
|
"pmaddwd %%mm2, %%mm5 \n\t" |
516 |
|
|
"pmaddwd %%mm0, %%mm6 \n\t" |
517 |
|
|
"pmaddwd %%mm2, %%mm7 \n\t" |
518 |
|
|
"pmaddwd 48(%1), %%mm0 \n\t" |
519 |
|
|
"pmaddwd 56(%1), %%mm2 \n\t" |
520 |
|
|
"paddd %%mm1, %%mm3 \n\t" |
521 |
|
|
"paddd %%mm4, %%mm5 \n\t" |
522 |
|
|
"paddd %%mm6, %%mm7 \n\t" |
523 |
|
|
"paddd %%mm0, %%mm2 \n\t" |
524 |
|
|
"movq (%2), %%mm0 \n\t" |
525 |
|
|
"paddd %%mm0, %%mm3 \n\t" |
526 |
|
|
"paddd %%mm0, %%mm5 \n\t" |
527 |
|
|
"paddd %%mm0, %%mm7 \n\t" |
528 |
|
|
"paddd %%mm0, %%mm2 \n\t" |
529 |
|
|
"psrad $"S(SHIFT_FRW_ROW)", %%mm3 \n\t" |
530 |
|
|
"psrad $"S(SHIFT_FRW_ROW)", %%mm5 \n\t" |
531 |
|
|
"psrad $"S(SHIFT_FRW_ROW)", %%mm7 \n\t" |
532 |
|
|
"psrad $"S(SHIFT_FRW_ROW)", %%mm2 \n\t" |
533 |
|
|
"packssdw %%mm5, %%mm3 \n\t" |
534 |
|
|
"packssdw %%mm2, %%mm7 \n\t" |
535 |
|
|
"movq %%mm3, 0(%3) \n\t" |
536 |
|
|
"movq %%mm7, 8(%3) \n\t" |
537 |
|
|
: |
538 |
|
|
: "r" (in), "r" (table), "r" (fdct_r_row), "r" (out)); |
539 |
|
160000 |
} |
540 |
|
|
|
541 |
|
20000 |
void ff_fdct_mmx(int16_t *block) |
542 |
|
|
{ |
543 |
|
|
DECLARE_ALIGNED(8, int64_t, align_tmp)[16]; |
544 |
|
20000 |
int16_t * block1= (int16_t*)align_tmp; |
545 |
|
20000 |
const int16_t *table= tab_frw_01234567; |
546 |
|
|
int i; |
547 |
|
|
|
548 |
|
20000 |
fdct_col_mmx(block, block1, 0); |
549 |
|
20000 |
fdct_col_mmx(block, block1, 4); |
550 |
|
|
|
551 |
✓✓ |
180000 |
for(i=8;i>0;i--) { |
552 |
|
160000 |
fdct_row_mmx(block1, block, table); |
553 |
|
160000 |
block1 += 8; |
554 |
|
160000 |
table += 32; |
555 |
|
160000 |
block += 8; |
556 |
|
|
} |
557 |
|
20000 |
} |
558 |
|
|
|
559 |
|
|
#endif /* HAVE_MMX_INLINE */ |
560 |
|
|
|
561 |
|
|
#if HAVE_MMXEXT_INLINE |
562 |
|
|
|
563 |
|
20000 |
void ff_fdct_mmxext(int16_t *block) |
564 |
|
|
{ |
565 |
|
|
DECLARE_ALIGNED(8, int64_t, align_tmp)[16]; |
566 |
|
20000 |
int16_t *block1= (int16_t*)align_tmp; |
567 |
|
20000 |
const int16_t *table= tab_frw_01234567; |
568 |
|
|
int i; |
569 |
|
|
|
570 |
|
20000 |
fdct_col_mmx(block, block1, 0); |
571 |
|
20000 |
fdct_col_mmx(block, block1, 4); |
572 |
|
|
|
573 |
✓✓ |
180000 |
for(i=8;i>0;i--) { |
574 |
|
160000 |
fdct_row_mmxext(block1, block, table); |
575 |
|
160000 |
block1 += 8; |
576 |
|
160000 |
table += 32; |
577 |
|
160000 |
block += 8; |
578 |
|
|
} |
579 |
|
20000 |
} |
580 |
|
|
|
581 |
|
|
#endif /* HAVE_MMXEXT_INLINE */ |
582 |
|
|
|
583 |
|
|
#if HAVE_SSE2_INLINE |
584 |
|
|
|
585 |
|
20000 |
void ff_fdct_sse2(int16_t *block) |
586 |
|
|
{ |
587 |
|
|
DECLARE_ALIGNED(16, int64_t, align_tmp)[16]; |
588 |
|
20000 |
int16_t * const block1= (int16_t*)align_tmp; |
589 |
|
|
|
590 |
|
20000 |
fdct_col_sse2(block, block1, 0); |
591 |
|
20000 |
fdct_row_sse2(block1, block); |
592 |
|
20000 |
} |
593 |
|
|
|
594 |
|
|
#endif /* HAVE_SSE2_INLINE */ |