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/* |
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* simple math operations |
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* Copyright (c) 2006 Michael Niedermayer <michaelni@gmx.at> et al |
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* |
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* This file is part of FFmpeg. |
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* |
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* FFmpeg is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU Lesser General Public |
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* License as published by the Free Software Foundation; either |
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* version 2.1 of the License, or (at your option) any later version. |
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* |
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* FFmpeg is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public |
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* License along with FFmpeg; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
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*/ |
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#ifndef AVCODEC_X86_MATHOPS_H |
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#define AVCODEC_X86_MATHOPS_H |
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#include "config.h" |
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#include "libavutil/common.h" |
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#include "libavutil/x86/asm.h" |
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#if HAVE_INLINE_ASM |
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#if ARCH_X86_32 |
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#define MULL MULL |
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static av_always_inline av_const int MULL(int a, int b, unsigned shift) |
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{ |
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int rt, dummy; |
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if (__builtin_constant_p(shift)) |
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__asm__ ( |
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"imull %3 \n\t" |
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"shrdl %4, %%edx, %%eax \n\t" |
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:"=a"(rt), "=d"(dummy) |
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:"a"(a), "rm"(b), "i"(shift & 0x1F) |
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); |
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else |
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__asm__ ( |
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"imull %3 \n\t" |
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"shrdl %4, %%edx, %%eax \n\t" |
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:"=a"(rt), "=d"(dummy) |
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:"a"(a), "rm"(b), "c"((uint8_t)shift) |
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); |
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return rt; |
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} |
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#define MULH MULH |
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static av_always_inline av_const int MULH(int a, int b) |
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{ |
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int rt, dummy; |
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__asm__ ( |
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"imull %3" |
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:"=d"(rt), "=a"(dummy) |
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:"a"(a), "rm"(b) |
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); |
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return rt; |
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} |
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#define MUL64 MUL64 |
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static av_always_inline av_const int64_t MUL64(int a, int b) |
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{ |
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int64_t rt; |
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__asm__ ( |
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"imull %2" |
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:"=A"(rt) |
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:"a"(a), "rm"(b) |
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); |
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return rt; |
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} |
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#endif /* ARCH_X86_32 */ |
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#if HAVE_I686 |
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/* median of 3 */ |
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#define mid_pred mid_pred |
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1043399218 |
static inline av_const int mid_pred(int a, int b, int c) |
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{ |
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1043399218 |
int i=b; |
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1043399218 |
__asm__ ( |
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"cmp %2, %1 \n\t" |
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"cmovg %1, %0 \n\t" |
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"cmovg %2, %1 \n\t" |
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"cmp %3, %1 \n\t" |
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"cmovl %3, %1 \n\t" |
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"cmp %1, %0 \n\t" |
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"cmovg %1, %0 \n\t" |
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:"+&r"(i), "+&r"(a) |
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:"r"(b), "r"(c) |
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); |
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return i; |
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} |
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#if HAVE_6REGS |
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#define COPY3_IF_LT(x, y, a, b, c, d)\ |
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__asm__ volatile(\ |
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"cmpl %0, %3 \n\t"\ |
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"cmovl %3, %0 \n\t"\ |
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"cmovl %4, %1 \n\t"\ |
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"cmovl %5, %2 \n\t"\ |
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: "+&r" (x), "+&r" (a), "+r" (c)\ |
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: "r" (y), "r" (b), "r" (d)\ |
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); |
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#endif /* HAVE_6REGS */ |
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#endif /* HAVE_I686 */ |
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#define MASK_ABS(mask, level) \ |
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__asm__ ("cdq \n\t" \ |
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"xorl %1, %0 \n\t" \ |
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"subl %1, %0 \n\t" \ |
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: "+a"(level), "=&d"(mask)) |
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// avoid +32 for shift optimization (gcc should do that ...) |
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#define NEG_SSR32 NEG_SSR32 |
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static inline int32_t NEG_SSR32( int32_t a, int8_t s){ |
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if (__builtin_constant_p(s)) |
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__asm__ ("sarl %1, %0\n\t" |
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: "+r" (a) |
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: "i" (-s & 0x1F) |
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); |
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else |
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__asm__ ("sarl %1, %0\n\t" |
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: "+r" (a) |
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: "c" ((uint8_t)(-s)) |
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); |
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return a; |
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} |
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#define NEG_USR32 NEG_USR32 |
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static inline uint32_t NEG_USR32(uint32_t a, int8_t s){ |
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if (__builtin_constant_p(s)) |
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__asm__ ("shrl %1, %0\n\t" |
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: "+r" (a) |
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: "i" (-s & 0x1F) |
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); |
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else |
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__asm__ ("shrl %1, %0\n\t" |
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: "+r" (a) |
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: "c" ((uint8_t)(-s)) |
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); |
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return a; |
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} |
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#endif /* HAVE_INLINE_ASM */ |
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#endif /* AVCODEC_X86_MATHOPS_H */ |
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